Trademark: 78567594
Status Date
Monday, February 2, 2009
Filing Date
Tuesday, February 15, 2005
Published for Opposition
Tuesday, October 9, 2007
Abandoned Date
Monday, February 2, 2009
9 INTEGRATED CIRCUITS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; PROCESSORS, NAMELY, DIGITAL SIGNAL PROCESSORS; FIELD PROGRAMMABLE GATE ARRAYS; COMPUTER MEMORIES, NAMELY, DOUBLE DATA RATE (DDR) AND SRAM MEMORY; ANALOG-TO-DIGITAL CONVERTERS; AND COMPUTER HARDWARE IN THE NATURE OF ANALOG AND DIGITAL INPUT/OUTPUT CONTROLLERS THAT PERFORM PARALLEL AND SERIAL OPERATIONS.
Feb 2, 2009
Abandonment Notice Mailed - No Use Statement Filed
Feb 2, 2009
Abandonment - No Use Statement Filed
Jul 1, 2008
Extension 1 Granted
Jul 1, 2008
Extension 1 Filed
Jul 1, 2008
Teas Extension Received
Jan 1, 2008
Noa Mailed - Sou Required From Applicant
Oct 9, 2007
Published For Opposition
Sep 19, 2007
Notice Of Publication
Sep 5, 2007
Law Office Publication Review Completed
Sep 5, 2007
Assigned To Lie
Jul 27, 2007
Approved For Pub - Principal Register
Jun 29, 2007
Teas/Email Correspondence Entered
Jun 29, 2007
Correspondence Received In Law Office
Jun 29, 2007
Teas Response To Office Action Received
Jan 13, 2007
Final Refusal E-Mailed
Jan 13, 2007
Final Refusal Written
Dec 2, 2006
Teas/Email Correspondence Entered
Dec 1, 2006
Correspondence Received In Law Office
Dec 1, 2006
Teas Response To Office Action Received
Jun 12, 2006
Non-Final Action E-Mailed
Jun 12, 2006
Non-Final Action Written
May 19, 2006
Lie Checked Susp - To Atty For Action
Nov 19, 2005
Letter Of Suspension E-Mailed
Nov 19, 2005
Suspension Letter Written
Oct 29, 2005
Teas/Email Correspondence Entered
Oct 19, 2005
Correspondence Received In Law Office
Oct 19, 2005
Teas Response To Office Action Received
Sep 12, 2005
Non-Final Action E-Mailed
Sep 12, 2005
Non-Final Action Written
Sep 12, 2005
Assigned To Examiner
Feb 22, 2005
New Application Entered In Tram
Trademark Alertz updated from USPTO on 2030-01-24
