Trademark: 78543123
Status Date
Tuesday, October 30, 2007
Filing Date
Thursday, January 6, 2005
Abandoned Date
Thursday, September 6, 2007
9 Integrated circuit which incorporate an on-chip network or grid architecture to interconnect processing units and other system components
Oct 30, 2007
Abandonment Notice Mailed - Failure To Respond
Oct 30, 2007
Abandonment - Failure To Respond Or Late Response
Mar 5, 2007
Final Refusal E-Mailed
Mar 5, 2007
Final Refusal Written
Dec 28, 2006
Assigned To Lie
Dec 27, 2006
Teas/Email Correspondence Entered
Dec 22, 2006
Correspondence Received In Law Office
Dec 27, 2006
Amendment To Use Processing Complete
Feb 9, 2006
Use Amendment Filed
Dec 22, 2006
Teas Response To Office Action Received
Dec 22, 2006
Petition To Revive-Granted
Dec 22, 2006
Teas Petition To Revive Received
Oct 24, 2006
Abandonment Notice Mailed - Failure To Respond
Oct 24, 2006
Abandonment - Failure To Respond Or Late Response
Mar 24, 2006
Non-Final Action E-Mailed
Mar 24, 2006
Non-Final Action Written
Feb 22, 2006
Amendment From Applicant Entered
Feb 13, 2006
Correspondence Received In Law Office
Feb 13, 2006
Paper Received
Feb 9, 2006
Teas Amendment Of Use Received
Aug 15, 2005
Non-Final Action E-Mailed
Aug 15, 2005
Non-Final Action Written
Aug 8, 2005
Assigned To Examiner
Jan 16, 2005
New Application Entered In Tram
Trademark Alertz updated from USPTO on 2030-01-24
