Trademark: 78139071
Status Date
Sunday, April 23, 2006
Filing Date
Wednesday, June 26, 2002
Published for Opposition
Tuesday, January 28, 2003
Abandoned Date
Sunday, April 23, 2006
9 PROCESSOR, INTEGRATED WITH A RELATED CONTROL CIRCUIT, WHERE THE PROCESSOR IMPLEMENTS A REDUCED INSTRUCTION SET COMPUTING ARCHITECTURE
Jun 27, 2006
Abandonment Notice Mailed - No Use Statement Filed
Jun 27, 2006
Abandonment - No Use Statement Filed
Sep 20, 2005
Extension 5 Granted
Sep 20, 2005
Extension 5 Filed
Sep 20, 2005
Teas Extension Received
Mar 23, 2005
Extension 4 Granted
Mar 23, 2005
Extension 4 Filed
Mar 23, 2005
Teas Extension Received
Sep 21, 2004
Extension 3 Granted
Sep 13, 2004
Extension 3 Filed
Sep 13, 2004
Teas Extension Received
Aug 25, 2004
Case File In Ticrs
Mar 3, 2004
Extension 2 Granted
Feb 20, 2004
Extension 2 Filed
Feb 20, 2004
Teas Extension Received
Oct 31, 2003
Extension 1 Granted
Oct 21, 2003
Extension 1 Filed
Oct 21, 2003
Teas Extension Received
Apr 22, 2003
Noa Mailed - Sou Required From Applicant
Jan 28, 2003
Published For Opposition
Jan 8, 2003
Notice Of Publication
Dec 4, 2002
Approved For Pub - Principal Register
Nov 15, 2002
Assigned To Examiner
Trademark Alertz updated from USPTO on 2030-01-24
