Trademark: 77176670
Status Date
Friday, September 11, 2015
Registration Number
3573287
Registration Date
Tuesday, February 10, 2009
Filing Date
Wednesday, May 9, 2007
Published for Opposition
Tuesday, April 22, 2008
Cancellation Date
Friday, September 11, 2015
9 Integrated circuits incorporating algorithms for use in power management of memory chips in a PC or embedded system environment
Sep 11, 2015
Cancelled Sec. 8 (6-Yr)
Feb 10, 2009
Registered-Principal Register
Jan 8, 2009
Law Office Registration Review Completed
Jan 7, 2009
Allowed Principal Register - Sou Accepted
Jan 6, 2009
Statement Of Use Processing Complete
Dec 16, 2008
Use Amendment Filed
Jan 6, 2009
Extension 1 Granted
Dec 16, 2008
Extension 1 Filed
Jan 6, 2009
Case Assigned To Intent To Use Paralegal
Dec 16, 2008
Teas Extension Received
Dec 16, 2008
Teas Statement Of Use Received
Jul 15, 2008
Noa Mailed - Sou Required From Applicant
Apr 22, 2008
Published For Opposition
Apr 2, 2008
Notice Of Publication
Mar 18, 2008
Law Office Publication Review Completed
Mar 18, 2008
Assigned To Lie
Feb 28, 2008
Approved For Pub - Principal Register
Feb 27, 2008
Teas/Email Correspondence Entered
Feb 26, 2008
Correspondence Received In Law Office
Feb 26, 2008
Teas Response To Office Action Received
Aug 28, 2007
Notification Of Non-Final Action E-Mailed
Aug 28, 2007
Non-Final Action E-Mailed
Aug 28, 2007
Non-Final Action Written
Aug 22, 2007
Assigned To Examiner
May 15, 2007
Notice Of Pseudo Mark Mailed
May 14, 2007
New Application Entered In Tram
Trademark Alertz updated from USPTO on 2030-01-24
