Trademark: 76640967
Status Date
Friday, May 30, 2014
Registration Number
3319080
Registration Date
Tuesday, October 23, 2007
Filing Date
Wednesday, June 15, 2005
Published for Opposition
Tuesday, October 10, 2006
Cancellation Date
Friday, May 30, 2014
9 Semiconductor design validation system primarily comprising a processor, a test pattern generator, and pin cards and its operating software for validating design of semiconductor integrated circuits based on design data produced through electronic design tools; and Blank storage media for storing electrical data or software, namely, compact disks, DVDs, magnetic disks, magnetic tapes, semiconductor memories
May 30, 2014
Cancelled Sec. 8 (6-Yr)
Oct 23, 2007
Registered-Principal Register
Sep 18, 2007
Law Office Registration Review Completed
Sep 18, 2007
Assigned To Lie
Aug 13, 2007
Allowed Principal Register - Sou Accepted
Jul 23, 2007
Statement Of Use Processing Complete
Apr 23, 2007
Use Amendment Filed
Apr 23, 2007
Paper Received
Jan 2, 2007
Noa Mailed - Sou Required From Applicant
Oct 10, 2006
Published For Opposition
Sep 20, 2006
Notice Of Publication
Aug 25, 2006
Law Office Publication Review Completed
Aug 18, 2006
Assigned To Lie
Aug 14, 2006
Approved For Pub - Principal Register
Jul 27, 2006
Amendment From Applicant Entered
Jul 3, 2006
Correspondence Received In Law Office
Jul 3, 2006
Paper Received
Jan 6, 2006
Non-Final Action Mailed
Jan 6, 2006
Non-Final Action Written
Jan 5, 2006
Assigned To Examiner
Jun 24, 2005
New Application Entered In Tram
Trademark Alertz updated from USPTO on 2030-01-24
